1. Field of the Invention
This invention is directed at a memory device, in general, and to a memory device having a nonvolatile MNOS device and a fixed threshold MOS device, in particular.
2. Prior Art
There are many memory devices which are known in the art and which are fabricated in accordance with so-called standard memory gate first (MGF) techniques. The known techniques for fabricating MOS-type devices yield devices which have fixed threshold characteristics and which exhibit hardness to ionizing radiation. Likewise, it is known to fabricate MNOS devices which provide nonvolatile memory devices or transistors. However, it is generally not known to produce both of these types of devices in a single process inasmuch as the processing characteristics of each of the devices are different and impacts the processing of the other device in a deleterious manner. That is, if the MOS device is fabricated subsequent to the MNOS device in a single array, the MNOS device is adversely affected in terms of the characteristics of the dielectric gate layer and, hence, the memory properties thereof.
In addition, other characteristics of the respective devices are also adversely affected. Consequently, it is highly desirable to establish a process which will permit MNOS memory devices and MOS fixed threshold devices to be fabricated in the same array in a process which does not injuriously or disadvantageously affect the operation of the other devices.